• A fabless company would normally only work on the logical design of a chip, determining how cells are connected and the functionality of the chip, while following design rules
  from the foundry the chip will be made in, while the physical design of the chip, the cells themselves, are normally done by the foundry and it comprises the physics of the transistor devices and how they are connected to form a logic gate.

• Using digital design components like adders, shifters, and state machines as well as computer architecture concepts like pipelining, superscalar execution, and branch prediction,
  RTL designers will break a functional description into hardware models of components on the chip working together.

• [citation needed] Physical design[edit] Physical design steps within the digital design flow RTL is only a behavioral model of the actual functionality of what the chip is
  supposed to operate under.

• The complexity of modern IC design, as well as market pressure to produce designs rapidly, has led to the extensive use of automated design tools in the IC design process.

• The use of standard cells allows the chip’s design to be split into logical and physical levels.

• [2] The top-down design style makes use of optimization-based tools similar to conventional digital flows.

• When inexpensive computer processing became available in the 1970s, computer programs were written to simulate circuit designs with greater accuracy than practical by hand
  calculation.

• For this reason, the next step in the IC design process, physical design stage, is to map the RTL into actual geometric representations of all electronics devices, such as
  capacitors, resistors, logic gates, and transistors that will go on the chip.

• IC designers will map out the functional requirements, verification testbenches, and testing methodologies for the whole project, and will then turn the preliminary design
  into a system-level specification that can be simulated with simple models using languages like C++ and MATLAB and emulation tools.

• A Process design kit (PDK) may be provided by the foundry and it may include the standard cell library as well as the specifications of the cells, and tools to verify the
  fabless company’s design against the design rules specified by the foundry as well as simulate it using the foundry’s cells.

• Finally, the physical layout of certain circuit subblocks is typically critical, in order to achieve the desired speed of operation, to segregate noisy portions of an IC from
  quiet portions, to balance the effects of heat generation across the IC, or to facilitate the placement of connections to circuitry outside the IC.

• For pure and new designs, the system design stage is where an Instruction set and operation is planned out, and in most chips existing instruction sets are modified for newer
  functionality.

• Computerized circuit simulation tools enable greater IC design complexity than hand calculations can achieve, making the design of analog ASICs practical.

• As many functional constraints must be considered in analog design, manual design is still widespread today.

• Design process Microarchitecture and system-level design[edit] The initial chip design process begins with system-level design and microarchitecture planning.

• Coping with variability[edit] A challenge most critical to analog IC design involves the variability of the individual devices built on the semiconductor chip.

• Design flow[edit] Major steps in the IC design flow A typical IC design cycle involves several steps: 1.

• • Electronic system-level design: This step creates the user functional specification.

• To reduce the number of functionality bugs, a separate hardware verification group will take the RTL and design testbenches and systems to check that the RTL actually is performing
  the same steps under many different conditions, classified as the domain of functional verification.

• Plan for next generation chip using production information if possible Summary[edit] Roughly saying, digital IC design can be divided into three parts.

• The third step, physical design, does not affect the functionality at all (if done correctly) but determines how fast the chip operates and how much it costs.

• Although a design may have successfully met the specifications of the product in the lab during the bringup phase there are many challenges that product engineers face when
  trying to mass-produce those designs.

• Many techniques are used, none of them perfect but all of them useful – extensive logic simulation, formal methods, hardware emulation, lint-like code checking, code coverage,
  and so on.

• [1] Analog design Before the advent of the microprocessor and software based design tools, analog ICs were designed using hand calculations and process kit parts.

• Design lifecycle The integrated circuit (IC) development process starts with defining product requirements, progresses through architectural definition, implementation, bringup
  and finally production.

• This step involves use of IC layout editor, layout and floor planning, figuring out which gates to use, defining places for them, and wiring (clock timing synthesis, routing)
  them together.

• • Physical circuit design: This step takes the RTL, and a library of available logic gates (standard cell library), and creates a chip design.

• Some design techniques used to reduce the effects of the device variation are:[3] • Using the ratios of resistors, which do match closely, rather than absolute resistor value.

• An iterative trial-and-error process and “overengineering” of device size was often necessary to achieve a manufacturable IC.

• Implementation[edit] In the implementation phase the design itself is created using the micro-architectural specification as the starting point.

• Within IC design companies, management and often analytics will draft a proposal for a design team to start the design of a new chip to fit into an industry segment.

• Unlike board-level circuit design which permits the designer to select devices that have each been tested and binned according to value, the device values on an IC can vary
  widely which are uncontrollable by the designer.

• As a result, modern design flows for analog circuits are characterized by two different design styles – top-down and bottom-up.

• This is achieved by adding extra vias or adding dummy metal/diffusion/poly layers wherever possible while complying to the design rules set by the foundry.

• Fidelity of analog signal amplification and filtering is usually critical, and as a result analog ICs use larger area active devices than digital designs and are usually less
  dense in circuitry.

• It has no link to a physical aspect of how the chip would operate in real life at the materials, physics, and electrical engineering side.

• • Design for manufacturability: The design is modified, where possible, to make it as easy and efficient as possible to produce.

 

Works Cited

[‘J. Lienig, J. Scheible (2020). “Chap. 3.3: Mask Data: Layout Post Processing”. Fundamentals of Layout Design for Electronic Circuits. Springer. pp. 102–110. doi:10.1007/978-3-030-39284-0. ISBN 978-3-030-39284-0. S2CID 215840278.
2. ^ Jump up to:a
b J. Lienig, J. Scheible (2020). “Chap. 4.6: Analog and Digital Design Flows”. Fundamentals of Layout Design for Electronic Circuits. Springer. pp. 151–159. doi:10.1007/978-3-030-39284-0. ISBN 978-3-030-39284-0. S2CID 215840278.
3. ^ Basu, Joydeep
(2019-10-09). “From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology”. IETE Journal of Education. 60 (2): 51–64. arXiv:1908.10674. doi:10.1080/09747338.2019.1657787. S2CID 201657819.
4. ^ “Developments of Multi-CAD
Models” (PDF). IC CAD Market Trends 2015. 2015-07-11.
Photo credit: https://www.flickr.com/photos/fossmarkfoto/5979193298/’]